DSD Processor of DAC chips

Modern chips have DSD processor for volume control and lowpass filtering.

CS43198 states that the processor is without an intermediate decimation.
So it means DSD256 still has sample rate of 11.2896Mhz and unstated bit-depth (32bit probably).
That would be insane. Is it even possible?

After the proccess, it goes to a multi-bit delta-sigma modulator. So the signal is some kind of PCM but quite big. Or is it?

What happens to the DSD signal in these chips, exactly?

DSD is by definition 1 bit, DSD256 is more or less equivalent to 384/24 PCM, there Isn’t a direct conversion, it might have slightly less dynamic range, and it theoretically allow reproduction of higher frequencies, though most of those will be removed from the signal by the analog filter.

I used to be a big SACD proponent, but modern PCM recordings are at least as good, and there are very few recordings that didn’t go through PCM encoding at some point.

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Yes but these chips can have volume control for DSD. How could they change the volume of DSD without making it multibit? Or have a digital lowpass filter?

Non-decimation means there’s no downsampling, right? and volume control means 32bits, right? So… some kind of DSD wide?
That’s what I don’t get.

The volume could be done any number of ways, from just using a digipot to reduce the volume of the modulated output to changing the way you modulate the output.

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